300-V High-Side Thin-Layer-SOI Field pLDMOS With Multiple Field Plates Based on Field Implant Technology
300-V High-Side Thin-Layer-SOI Field pLDMOS With Multiple Field Plates Based on Field Implant Technology
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DOI：
10.1109/led.2012.2210023
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发表时间：
2012-08
影响因子：
4.9
通讯作者：
M. Qiao;Xin Zhou;Yitao He;Heng-juan Wen;Yuanyuan Zhao;Bo Zhang;Zhaoji Li
中科院分区：
文献类型：
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作者：
M. Qiao;Xin Zhou;Yitao He;Heng-juan Wen;Yuanyuan Zhao;Bo Zhang;Zhaoji Li
采用场注入（FI）技术和多场板（MFPs）技术，研制了一种新型300 V高压侧薄层SOI场型pLDMOS。通过建立解析模型、模拟和实验验证，研究了高压侧薄层SOI场型pLDMOS背栅穿通和雪崩击穿的击穿机理。通过所提出的FI技术实现的浅结深度的p场衰减BG穿通效应;通过使用MFP可以避免过早的表面雪崩击穿。在1.5 μm厚的SOI层上实验实现了击穿电压为340 V的高压侧场pLDMOS，并成功应用于200 V高压开关集成电路中。
A novel 300-V high-side thin-layer-SOI field pLDMOS adopting field implant (FI) technology and multiple field plates (MFPs) has been developed. Breakdown mechanisms of back gate (BG) punchthrough and avalanche breakdown for highside thin-layer-SOI field pLDMOS are investigated by setting up an analytic model, simulating, and verifying experimentally. Shallow junction depth of p-field achieved by the proposed FI technology attenuates BG punchthrough effect; premature surface avalanche breakdown can be avoided by using MFPs. High-side field pLDMOS with a breakdown voltage (BV) of 340 V is experimentally realized on a 1.5-μm -thick SOI layer and successfully applied in a 200-V high-voltage switching IC.