FAST-BIST: Faster-than-at-Speed BIST targeting hidden delay defects
FAST-BIST: Faster-than-at-Speed BIST targeting hidden delay defects
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DOI：
10.1109/test.2014.7035360
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发表时间：
2014-10
期刊：
影响因子：
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通讯作者：
S. Hellebrand;T. Indlekofer;M. Kampmann;M. Kochte;Chang Liu;H. Wunderlich
中科院分区：
文献类型：
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作者：
S. Hellebrand;T. Indlekofer;M. Kampmann;M. Kochte;Chang Liu;H. Wunderlich
小延迟故障可能是可靠性威胁的指示器，即使它们还不影响系统功能。近年来，快于速度测试（Faster-than-at-Speed-Test，FAST）已成为检测组合逻辑中时间松弛或长关键路径所隐藏的故障的一种可行方法。FAST在时间、性能和分辨率方面对自动测试设备提出了严峻的挑战。在本文中，它是如何逻辑内置自测试（BIST）或嵌入式确定性测试可以用于一个有效的FAST应用程序。仅以更高的频率运行BIST不是一个选择，因为长路径的输出将因设置时间违规而接收未定义的值并破坏签名寄存器的内容。相反，对于给定的测试模式序列，故障分类根据最佳检测频率。对于每个类，基于MISR的压缩方案是适应的，使得要观察的关键位可以通过代数计算来确定。实验表明，相当少量的中间签名必须进行评估，以观察一个大部分的隐藏的延迟故障可测试的给定的测试序列。
Small delay faults may be an indicator of a reliability threat, even if they do not affect the system functionality yet. In recent years, Faster-than-at-Speed-Test (FAST) has become a feasible method to detect faults, which are hidden by the timing slack or by long critical paths in the combinational logic. FAST poses severe challenges to the automatic test equipment with respect to timing, performance, and resolution. In this paper, it is shown how logic built-in self-test (BIST) or embedded deterministic test can be used for an efficient FAST application. Running BIST just at a higher frequency is not an option, as outputs of long paths will receive undefined values due to set time violations and destroy the content of the signature registers. Instead, for a given test pattern sequence, faults are classified according to the optimal detection frequency. For each class, a MISR-based compaction scheme is adapted, such that the critical bits to be observed can be determined by algebraic computations. Experiments show that rather a small number of inter-mediate signatures have to be evaluated to observe a large fraction of hidden delay faults testable by the given test sequence.