Design and analysis of ring oscillator based Design-for-Trust technique
Design and analysis of ring oscillator based Design-for-Trust technique
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基于可信设计技术的环形振荡器的设计与分析
DOI：
10.1109/vts.2011.5783766
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发表时间：
2011
期刊：
影响因子：
--
通讯作者：
R. Karri
中科院分区：
文献类型：
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作者：
Jeyavijayan Rajendran;V. Jyothi;O. Sinanoglu;R. Karri
由于硬件中恶意包含的机会越来越多，可信设计 (DFTr) 正在成为一种重要的 IC 设计方法。为了将 DFTr 技术纳入 IC 开发周期，它们必须在木马检测能力、硬件开销和测试成本方面具有实用性。我们提出了一种非侵入式 DFTr 技术，该技术可以在存在流程变化和测量错误的情况下检测木马。该技术可以检测插入所有或部分 IC 中的木马。它适用于 ASIC 和 FPGA 实现。通过添加少量逻辑，将设计中的电路路径重新配置为环形振荡器1 (RO)。通过观察RO频率的变化来检测木马。提供了一种算法来保护所有门，同时减少硬件开销。我们分析了所提出的 DFTr 技术的覆盖范围、面积和测试时间开销。为了证明其在现实世界中的有效性，所提出的技术已通过红队蓝队方法进行了验证。
Due to the increasing opportunities for malicious inclusions in hardware, Design-for-Trust (DFTr) is emerging as an important IC design methodology. In order to incorporate the DFTr techniques into the IC development cycle, they have to be practical in terms of their Trojan detection capabilities, hardware overhead, and test cost. We propose a non-invasive DFTr technique, which can detect Trojans in the presence of process variations and measurement errors. This technique can detect Trojans that are inserted in all or a subset of the ICs. It is applicable to both ASICs and FPGA implementations. Circuit paths in a design are reconfigured into ring oscillators1 (ROs) by adding a small amount of logic. Trojans are detected by observing the changes in the frequency of the ROs. An algorithm is provided to secure all the gates, while reducing the hardware overhead. We analyzed the coverage, area and test time overhead of the proposed DFTr technique. To demonstrate its effectiveness in the real world, the proposed technique had been validated by a red-team blue-team approach.