Modeling and Simulation of Circuit-Level Nonidealities for an Analog Computing Design Approach With Application to EEG Feature Extraction
Modeling and Simulation of Circuit-Level Nonidealities for an Analog Computing Design Approach With Application to EEG Feature Extraction
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DOI：
10.1109/tcad.2022.3170248
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发表时间：
2023-01
影响因子：
2.9
通讯作者：
Nikita Mirchandani;Yuqing Zhang;Safaa A. Abdelfattah;M. Onabajo;A. Shrivastava
中科院分区：
文献类型：
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作者：
Nikita Mirchandani;Yuqing Zhang;Safaa A. Abdelfattah;M. Onabajo;A. Shrivastava
本文提出了一种设计方法，用于在可穿戴健康监测应用中使用脑电图（EEG）信号进行癫痫发作检测的超低功耗（ULP）模拟计算机器学习（ML）电路的建模和仿真。在这篇文章中，我们描述了一种新的模拟系统建模和仿真技术，将功耗，噪声，线性度和模拟电路的其他关键性能参数与给定ML网络的分类精度相关联，从而可以根据不同的应用特定需求实现功耗和性能优化的模拟ML硬件实现。我们进行了电路模拟，以获得非理想性，然后数学建模的准确映射。我们对噪声、非线性、分辨率和工艺变化进行了建模，使得模型可以准确地获得基于模拟计算的癫痫发作检测系统的分类准确度。噪声已被建模为输入参考的白色噪声，可以直接添加到输入端。器件工艺和温度变化被建模为电路参数的随机波动，如增益和截止频率。将非线性数学建模为幂级数。然后模拟组合的系统级模型用于分类精度评估。该设计方法有助于在为ML网络开发定制模拟电路的过程中优化功耗和面积，能够在确保所需分类精度的同时，潜在地权衡功耗和性能目标。仿真技术还使得能够确定模拟计算硬件中的每个电路块的目标规格。这是通过开发ML硬件模型，并研究电路非理想性对分类精度的影响。模拟计算EEG癫痫发作检测块的仿真显示了91%的分类准确率。所提出的建模方法将大大减少大型模拟计算系统的设计时间和复杂性。两种特征提取方法也比较了模拟计算架构。
This article presents a design approach for the modeling and simulation of ultralow power (ULP) analog computing machine learning (ML) circuits for seizure detection using electroencephalography (EEG) signals in wearable health monitoring applications. In this article, we describe a new analog system modeling and simulation technique to associate power consumption, noise, linearity, and other critical performance parameters of analog circuits with the classification accuracy of a given ML network, which allows to realize a power and performance optimized analog ML hardware implementation based on diverse application-specific needs. We carried out circuit simulations to obtain nonidealities, which are then mathematically modeled for an accurate mapping. We have modeled noise, nonlinearity, resolution, and process variations such that the model can accurately obtain the classification accuracy of the analog computing-based seizure detection system. Noise has been modeled as an input-referred white noise that can be directly added at the input. Device process and temperature variations were modeled as random fluctuations in circuit parameters, such as gain and cut-off frequency. Nonlinearity was mathematically modeled as a power series. The combined system level model was then simulated for classification accuracy assessments. The design approach helps to optimize power and area during the development of tailored analog circuits for ML networks with the ability to potentially trade power and performance goals while still ensuring the required classification accuracy. The simulation technique also enables to determine target specifications for each circuit block in the analog computing hardware. This is achieved by developing the ML hardware model, and investigating the effect of circuit nonidealities on classification accuracy. Simulation of an analog computing EEG seizure detection block shows a classification accuracy of 91%. The proposed modeling approach will significantly reduce design time and complexity of large analog computing systems. Two feature extraction approaches are also compared for an analog computing architecture.