Design Space Evaluation of a Memristor Crossbar Based Multilayer Perceptron for Image Processing
Design Space Evaluation of a Memristor Crossbar Based Multilayer Perceptron for Image Processing
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DOI：
10.1109/ijcnn.2019.8852005
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发表时间：
2019-07
期刊：
影响因子：
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通讯作者：
C. Yakopcic;B. R. Fernando;T. Taha
中科院分区：
文献类型：
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作者：
C. Yakopcic;B. R. Fernando;T. Taha
本文描述了一种基于记忆阻器的模拟神经形态系统，该系统可用于多层感知器算法的非原位训练。所提出的编程技术可用于将神经算法所需的权值直接映射到忆阻交叉栅中的电阻网格上。利用这种权重到横杆的映射方法以及点积计算电路，可以很容易地实现神经算法。为了证明该电路的有效性，我们训练了一个多层感知器来执行索贝尔边缘检测。在这些模拟之后，分析了忆阻器编程精度和网络大小与输出误差的关系；结果表明，可以通过增大网络大小来减小测试误差。在某些情况下，如果网络尺寸增加，电路中的忆阻器可能能够以较低的精度工作。这意味着可以使用精度较低（或分辨率较低）的忆阻器器件来实现所提出的系统。此外，功率，时序和能量分析表明，该电路具有计算吞吐量，允许它以大约337mW的速度实时处理4K UHD视频。
This paper describes a simulated memristor-based neuromorphic system that can be used for ex-situ training of a multi-layer perceptron algorithm. The presented programming technique can be used to map the weights required of a neural algorithm directly onto the grid of resistances in a memristor crossbar. Using this weight-to-crossbar mapping approach along with the dot product calculation circuit, neural algorithms can be easily implemented using this system. To show the effectiveness of this circuit, a Multilayer Perceptron is trained to perform Sobel edge detection. Following these simulations, an analysis was presented that shows how memristor programming accuracy and network size are related to output error; the results show that network size can be increased to reduce testing error. In some cases, the memristors in the circuit may be capable of operating with at lower precision if the network size is increased. This means that less precise (or lower resolution) memristor devices may be used to implement the proposed system. Furthermore, a power, timing, and energy analysis shows that this circuit has a computation throughput that allows it to process 4K UHD video in real time at approximately 337mW.