A defect-tolerant memory architecture for molecular electronics
A defect-tolerant memory architecture for molecular electronics
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DOI:
10.1109/nano.2003.1231012
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发表时间:
2004
影响因子:
2.4
通讯作者:
Myung-Hyun Lee;Young Kwan Kim;Yoon-Hwa Choi
中科院分区:
文献类型:
--
作者:
Myung-Hyun Lee;Young Kwan Kim;Yoon-Hwa Choi
This paper presents a defect-tolerant memory architecture for molecular electronics. A crossbar structure, where molecules are sandwiched between nanowires, is used as a model to realize molecular memory and to achieve defect tolerance. Defects in the logic circuits for addressing memory are also taken into account. The number of spare rows and columns to form a functioning memory is estimated by computer simulation for various values of defect rate and memory size.