Investigation and Failure Mode of Asymmetric and Double Trench SiC mosfets Under Avalanche Conditions
Investigation and Failure Mode of Asymmetric and Double Trench SiC mosfets Under Avalanche Conditions
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雪崩条件下非对称双沟槽 SiC MOSFET 的研究和失效模式
DOI：
10.1109/tpel.2020.2967497
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发表时间：
2020-08-01
影响因子：
6.7
通讯作者：
Zhang, Bo
中科院分区：
文献类型：
--
作者：
Deng, Xiaochuan;Zhu, Hao;Zhang, Bo
本文通过实验和有限元模拟研究了两个厂家的商用1200 V非对称和双沟槽碳化硅（SiC）金属氧化物半导体场效应晶体管（MOSFET）在单脉冲非箝位电感开关（UIS）应力下的工作特性。计算了雪崩时间随雪崩能量的变化，以及临界雪崩能量和最大功耗随温度的变化。结果发现，两个故障机制被确定，即，热失控和栅氧化层破裂。对于非对称沟槽SiC MOSFET，其失效模式在不同温度下均为热失控。然而，双沟槽SiC MOSFET的失效模式是热失控或栅氧化层破裂，这表明在UIS应力下不稳定的雪崩鲁棒性。记录直流参数的变化，以评估器件故障的外部特征。此外，有限元模拟被用来揭示雪崩过程中的器件内部的电热应力。最后，将失效器件解封，以从半导体管芯的角度验证失效点的位置。
In this article, commercially 1200-V asymmetric and double trench silicon carbide (SiC) metal-oxide-semiconductor-field-effect transistors (mosfets) from two manufacturers are investigated by experiment and finite-element simulation under single-pulse unclamped inductive switching (UIS) stress. The variation in avalanche time with mosfet avalanche energy and temperatures dependence of critical avalanche energy and maximum power dissipation are evaluated. It is found that two failure mechanisms are identified, i.e., thermal runaway and gate oxide rupture. For asymmetric trench SiC mosfets, the failure mode are all thermal runaway at various temperatures. However, the failure mode of double trench SiC mosfets is thermal runaway or gate oxide rupture, which indicates an instable avalanche robustness under UIS stress. The variations of dc parameters are recorded to evaluate external features of device failure. Furthermore, finite-element simulation is used to reveal the electro-thermal stress inside the device during avalanche. Finally, failed devices are decapsulated to verify the location of failure point from the perspective of the semiconductor die.