On equivalence checking between behavioral and RTL descriptions
On equivalence checking between behavioral and RTL descriptions
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DOI:
10.1109/hldvt.2004.1431267
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发表时间:
2004-11
期刊:
影响因子:
--
通讯作者:
M. Fujita
中科院分区:
文献类型:
--
作者:
M. Fujita
In this paper we present techniques for comparison between behavioral level and register transfer level (RTL) design descriptions by mapping the designs into virtual controllers and virtual datapaths. We also discuss about how the equivalence between behavioral level and RTL designs can be defined precisely using the proposed "attribute statements" in an interactive fashion. Implementation issues as well as considerations on real life industrial design examples are presented as well.