CMOS pixel sensor development: a fast read-out architecture with integrated zero suppression
CMOS pixel sensor development: a fast read-out architecture with integrated zero suppression
复制标题
DOI：
10.1088/1748-0221/4/04/p04012
复制
发表时间：
2009-04-01
影响因子：
1.3
通讯作者：
Winter, M.
中科院分区：
文献类型：
--
作者：
Hu-Guo, Ch.;Baudot, J.;Winter, M.
CMOS 单片有源像素传感器 (MAPS) 已证明其在跟踪设备方面的强大潜力，特别是在风味标签方面。预计他们将配备多个顶点探测器和光束望远镜。大多数应用都需要高读出速度，这迫使传感器必须具有集成零抑制功能的数字输出。将回顾 IPHC 和 IRFU 解决此问题的 MAPS 的最新发展。将介绍结合像素阵列、列级鉴别器和零抑制电路的设计架构。每个像素都配有前置放大器和相关双采样 (CDS) 微电路，可减少瞬时噪声和固定模式噪声。该传感器是完全可编程的并且可以被监控。它将配备实验装置，从2009/2010年开始采集数据。
CMOS Monolithic Active Pixel Sensors ( MAPS) have demonstrated their strong potential for tracking devices, particularly for flavour tagging. They are foreseen to equip several vertex detectors and beam telescopes. Most applications require high read-out speed, which imposes sensors to feature digital output with integrated zero suppression. The most recent development of MAPS at IPHC and IRFU addressing this issue will be reviewed. The design architecture, combining pixel array, column-level discriminators and zero suppression circuits, will be presented. Each pixel features a preamplifier and a correlated double sampling (CDS) micro-circuit reducing the temporal and fixed pattern noises. The sensor is fully programmable and can be monitored. It will equip experimental apparatus starting data taking in 2009/2010.