A Triple Core Lock-Step (TCLS) ARM® Cortex®-R5 Processor for Safety-Critical and Ultra-Reliable Applications
A Triple Core Lock-Step (TCLS) ARM® Cortex®-R5 Processor for Safety-Critical and Ultra-Reliable Applications
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适用于安全关键和超可靠应用的三核锁步 (TCLS) ARM® Cortex®-R5 处理器
DOI：
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发表时间：
2016
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通讯作者：
Shidhartha Das
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作者：
X. Iturbe;Balaji Venu;Emre Ozer;Shidhartha Das
本文介绍了ARM三核锁步（TCLS）架构，该架构建立在目前用于安全关键实时应用的ARM Cortex-R5双核锁步（DCLS）处理器的行业成功基础上。TCLS架构为DCLS Cortex-R5系统增加了第三个冗余CPU单元，以实现故障功能，从而提高系统的可用性。TCLS架构允许在发生错误的情况下对CPU进行透明、更快和更可靠的处理，因为可以通过比较其输出来识别错误的CPU，并且可以从其他两个功能正确的CPU中的一个恢复正确的架构状态。由于不需要校正与CPU共享和隔离的该高速缓存存储器的状态，所以快速缓存也是可能的。由于TCLS架构在系统级提供可靠性，因此单个CPU不需要容错，并且可以使用比抗辐射工艺技术提供更高性能、更好的能量和成本效率的商业技术工艺来实现。期望TCLS可以提高ARM处理器主流的工业应用的可靠性（例如，汽车），以及在当前不存在ARM技术的新应用中（例如，空间）。
This paper introduces the ARM Triple Core Lock-Step (TCLS) architecture, which builds up on the industry success of the ARM Cortex-R5 Dual-Core Lock-Step (DCLS) processor currently used in safety-critical real-time applications. The TCLS architecture adds a third redundant CPU unit to the DCLS Cortex-R5 system to achieve fail functional capabilities and hence increase the availability of the system. The TCLS architecture allows for transparent, quicker and more reliable resynchronization of the CPUs in the event of an error as the erroneous CPU can be identified by comparing its outputs, and the correct architectural state can be restored from one of the other two functionally correct CPUs. The quick resynchronization is also possible because there is no need to correct the state of the cache memories, which are shared and isolated from the CPUs. As the TCLS architecture provides reliability at the system level, individual CPUs do not need to be fault-tolerant, and can be implemented using commercial technology process that provides higher performance, better energy and cost efficiency than rad-hard process technology. The expectation is that the TCLS could increase reliability in the industrial applications where ARM processors are mainstream (e.g., automotive), as well as in new applications where there is currently no presence of ARM technology (e.g., space).