Microarchitectural simulation and control of di/dt-induced power supply voltage variation
Microarchitectural simulation and control of di/dt-induced power supply voltage variation
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DOI：
10.1109/hpca.2002.995694
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发表时间：
2002-02
期刊：
影响因子：
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通讯作者：
Edward T. Grochowski;D. Ayers;V. Tiwari
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文献类型：
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作者：
Edward T. Grochowski;D. Ayers;V. Tiwari
随着现代高性能微处理器的功耗增加到超过 100 W，功耗成为越来越重要的设计考虑因素。本文提出了一种新技术，用于模拟执行典型软件时微处理器内不同活动级别导致的电源电压变化。电压模拟功能可以添加到现有的微架构模拟器中，该模拟器逐个时钟地确定每个功能块的活动。然后，我们讨论如何在微处理器芯片上的逻辑中实现相同的技术，以实现电流消耗和电源电压的实时计算。当用于反馈环路时，该逻辑可以控制微处理器的活动，以减少对电力传输系统的需求。通过片上电压计算和 di/dt 控制，我们表明可以在性能损失或平均功率增加很少的情况下显着减少电源电压变化。
As the power consumption of modern high-performance microprocessors increases beyond 100 W, power becomes an increasingly important design consideration. This paper presents a novel technique to simulate power supply voltage variation as a result of varying activity levels within the microprocessor when executing typical software. The voltage simulation capability may be added to existing microarchitecture simulators that determine the activities of each functional block on a clock-by-clock basis. We then discuss how the same technique can be implemented in logic on the microprocessor die to enable real-time computation of current consumption and power supply voltage. When used in a feedback loop, this logic makes it possible to control the microprocessor's activities to reduce demands on the power delivery system. With on-die voltage computation and di/dt control, we show that a significant reduction in power supply voltage variation may be achieved with little performance loss or average power increase.