Delay Monitoring System With Multiple Generic Monitors for Wide Voltage Range Operation

Delay Monitoring System With Multiple Generic Monitors for Wide Voltage Range Operation
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具有多个通用监视器的延迟监视系统,适用于宽电压范围操作

DOI:
10.1109/tvlsi.2017.2757511
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发表时间:
2018
影响因子:
2.8
通讯作者:
J. Choi
J. Choi
中科院分区:
工程技术2区
文献类型:
--
作者:
Jongho Kim;Kiyoung Choi;Yonghwan Kim;Wook Kim;K. Do;J. Choi

文献摘要

被引文献

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随着半导体工艺技术的不断缩小,由于制造和环境变化导致的电路延迟变化变得越来越严重。这些延迟变化很难预测,因此需要额外的设计裕度,这阻碍了降低芯片面积和功耗的机会。缓解这一问题的最佳解决方案之一是测量运行时的电路延迟,并通过闭环动态电压和频率调节(DVFS)方案相应地控制电源电压。该方案的关键问题是监控电路与目标块之间的时延不匹配。较大的延迟失配可能会失去闭环DVFS的优势。随着电路块在更宽的电压范围内工作,从接近阈值电压到超过驱动电压,情况会变得更糟。本文提出了一种新型的具有多个通用监控器的宽电压范围延迟监控系统,与传统的监控方法相比,它在监控电路和目标块之间提供了更好的延迟相关性。对于采用14 nm FinFET工艺的流行处理器核,所提出的方法将最大误差降低高达91%,从而降低了设计容限、低功耗和/或低成本设计。
As the semiconductor process technology continuously scales down, circuit delay variations due to manufacturing and environmental variations become more and more serious. These delay variations are hardly predictable and thus require an additional design margin, which impedes the chance to reduce the area and power consumption of a chip. One of the best solutions to alleviate this problem is to measure circuit delays at run time and control the supply voltage accordingly through a closed-loop dynamic voltage and frequency scaling (DVFS) scheme. The key issue of this scheme is the delay mismatch between the monitoring circuit and the target block. A large delay mismatch might lose the advantage of the closed-loop DVFS. It becomes much worse as a circuit block operates in wider voltage range, from near-threshold voltage to super-overdrive voltage. This paper proposes novel delay monitoring systems with multiple generic monitors for wide voltage range operation, which provide a better delay correlation between the monitoring circuit and the target block compared to conventional monitoring approaches. The proposed approaches reduce the maximum error by up to 91% for a popular processor core in a 14-nm FinFET process technology, thereby bring a decrease of design margin, lower-power, and/or lower-cost design.