Mapping application performance to HPC architecture
Mapping application performance to HPC architecture
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DOI：
10.1016/j.cpc.2011.11.013
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发表时间：
2012-03-01
影响因子：
6.3
通讯作者：
Laughton, C.
中科院分区：
文献类型：
--
作者：
Gray, A.;Bethune, I.;Laughton, C.
A suite of application benchmarks, designed to be broadly representative of UK HPC usage, has been developed to stress a broad range of architectural features of large scale parallel HPC resources. A generic methodology to investigate application performance and scaling characteristics has been defined, resulting in a detailed understanding of the performance of these applications. This methodology is transferable to other applications and systems: it is of practical value to developers and users who are aiming for optimal utilisation of HPC resources. An understanding of the performance characteristics of a range of large-scale HPC resources has been obtained using low-level synthetic benchmarks. A relatively simple, qualitative mechanism to assess and predict application performance on current and future architectures using synthetic benchmark results together with application performance analysis results is explored. (C) 2011 Elsevier B.V. All rights reserved.
