A Trimodal Wireless Implantable Neural Interface System-on-Chip.
A Trimodal Wireless Implantable Neural Interface System-on-Chip.
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DOI：
10.1109/tbcas.2020.3037452
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发表时间：
2020-12
影响因子：
5.1
通讯作者：
Ghovanloo M
中科院分区：
文献类型：
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作者：
Jia Y;Guler U;Lai YP;Gong Y;Weber A;Li W;Ghovanloo M
无线无电池三模态神经接口片上系统（SoC），能够实现16通道神经记录、8通道电刺激和16通道光刺激，全部集成在一个5×3 mm 2芯片上，采用0.35 μm标准CMOS工艺制造。三模态SoC被设计为感应供电和通信。下行链路数据遥测利用功率载波的开关键控脉冲位置调制（OOOK-PPM）以50 kbps的速率传送配置和控制命令。模拟前端（AFE）提供55-70 dB的可调中频带增益、1-100 Hz/10 kHz的低/高截止频率以及1 Hz-50 kHz频带内3.46 μVrms的输入参考噪声。每两个通道的AFE输出由50 kS/s的10位SAR-ADC数字化，并多路复用在一起形成6.78 Mbps的数据流，通过功率放大器（PA）和6 cm长的天线，形成上行数据遥测，通过OOK调制434 MHz的RF载波发送。光学刺激具有基于开关电容器的刺激（SCS）架构，可按需对4个存储电容器组依次充电至4 V，并以高达24.8 mA的瞬时电流水平在选定的μ LED中放电。电刺激由4个独立驱动的刺激部位支持，5位可控电流水平在±（25-775）μA范围内，同时有源/无源电荷平衡电路确保安全性。对4只麻醉大鼠进行体内测试，以验证三模式SoC的功能。
A wireless and battery-less trimodal neural interface system-on-chip (SoC), capable of 16-ch neural recording, 8-ch electrical stimulation, and 16-ch optical stimulation, all integrated on a 5×3 mm2 chip fabricated in 0.35-μm standard CMOS process. The trimodal SoC is designed to be inductively powered and communicated. The downlink data telemetry utilizes on-off keying pulse-position modulation (OOK-PPM) of the power carrier to deliver configuration and control commands at 50 kbps. The analog front-end (AFE) provides adjustable mid-band gain of 55–70 dB, low/high cut-off frequencies of 1–100 Hz/10 kHz, and input-referred noise of 3.46 μVrms within 1 Hz-50 kHz band. AFE outputs of every two-channel are digitized by a 50 kS/s 10-bit SAR-ADC, and multiplexed together to form a 6.78 Mbps data stream to be sent out by OOK modulating a 434 MHz RF carrier through a power amplifier (PA) and 6 cm monopole antenna, which form the uplink data telemetry. Optical stimulation has a switched-capacitor based stimulation (SCS) architecture, which can sequentially charge 4 storage capacitor banks up to 4 V and discharge them in selected μLEDs at instantaneous current levels of up to 24.8 mA on demand. Electrical stimulation is supported by 4 independently driven stimulating sites at 5-bit controllable current levels in ±(25–775) μA range, while active/passive charge balancing circuits ensure safety. In vivo testing was conducted on 4 anesthetized rats to verify the functionality of the trimodal SoC.