Reduced-Complexity Singular Value Decomposition For Tucker Decomposition: Algorithm And Hardware
Reduced-Complexity Singular Value Decomposition For Tucker Decomposition: Algorithm And Hardware
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DOI：
10.1109/icassp40776.2020.9054313
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发表时间：
2020-05
期刊：
影响因子：
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通讯作者：
Xiaofeng Hu;Chunhua Deng;Bo Yuan
中科院分区：
文献类型：
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作者：
Xiaofeng Hu;Chunhua Deng;Bo Yuan
张量作为矩阵的多维推广，自然适合于表示和处理高维数据。迄今为止，张量已被广泛应用于各种数据密集型应用，如机器学习和大数据分析。然而，由于张量固有的大尺寸特性，张量算法作为张量的合成、变换或分解方法，计算量和存储量都非常昂贵，从而阻碍了张量在许多应用场景中的进一步应用，特别是在资源受限的硬件平台上。在本文中，我们提出了一个降低复杂度的SVD（奇异向量分解）方案，它作为Tucker分解的关键操作。通过使用迭代自乘，该方案可以显着减少SVD的存储和计算成本，从而降低整个过程的复杂度。在此基础上，采用28nm CMOS工艺设计了相应的硬件结构。我们的综合设计可以实现102GOPS与1.09 mm2的面积和37.6 mW的功耗，从而提供了一个有前途的解决方案，加速塔克分解。
Tensors, as the multidimensional generalization of matrices, are naturally suited for representing and processing high-dimensional data. To date, tensors have been widely adopted in various data-intensive applications, such as machine learning and big data analysis. However, due to the inherent large-size characteristics of tensors, tensor algorithms, as the approaches that synthesize, transform or decompose tensors, are very computation and storage expensive, thereby hindering the potential further adoptions of tensors in many application scenarios, especially on the resource-constrained hardware platforms. In this paper, we propose a reduced-complexity SVD (Singular Vector Decomposition) scheme, which serves as the key operation in Tucker decomposition. By using iterative self-multiplication, the proposed scheme can significantly reduce the storage and computational costs of SVD, thereby reducing the complexity of the overall process. Then, corresponding hardware architecture is developed with 28nm CMOS technology. Our synthesized design can achieve 102GOPS with 1.09 mm2 area and 37.6 mW power consumption, and thereby providing a promising solution for accelerating Tucker decomposition.