Cardinality Counting Circuit for Real-Time Abnormal Traffic Detection
Cardinality Counting Circuit for Real-Time Abnormal Traffic Detection
复制标题
用于实时异常流量检测的基数计数电路
DOI：
10.1109/compsac.2017.81
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发表时间：
2017
期刊：
影响因子：
--
通讯作者：
K. Yoshida and H. Nishikawa
中科院分区：
文献类型：
--
作者：
S. Sannomiya;A. Sato;K. Yoshida and H. Nishikawa
为了抵抗P2P、DDoS和互联网蠕虫等异常流量的增长，讨论了一种实现宽带网络异常流量实时检测的电路设计。基数的实时计数是电路的关键。虽然我们之前的研究表明了基数计数对检测各种异常流量的有效性，但DRAM访问的缓慢阻碍了我们将基数计数真正部署到骨干网络中。文章指出，利用自定时流水线电路，通过隐藏DRAM访问延迟，可以实现一个能够处理高达100Gbps网络的基数计数电路。
To resist the growth of abnormal traffic such as P2P, DDoS and Internet worms, this paper discusses a circuit design to realize real-time abnormal traffic detection from broadband networks. Real-time counting of cardinality is the key of the circuit. Although our previous study showed the effectiveness of cardinality counting to detect various abnormal traffic, the slowness of DRAM access prevented us from actually deploying the cardinality counting into backbone network. This paper shows that the use of self-timed pipeline circuit can realize a cardinality counting circuit that can handle up-to 100 Gbps networks by hiding the DRAM access latency.