Fat H-Tree: A Cost-Efficient Tree-Based On-Chip Network
Fat H-Tree: A Cost-Efficient Tree-Based On-Chip Network
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DOI：
10.1109/tpds.2008.233
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发表时间：
2007-03
影响因子：
5.3
通讯作者：
Hiroki Matsutani;M. Koibuchi;Yutaka Yamada;D. Hsu;H. Amano
中科院分区：
文献类型：
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作者：
Hiroki Matsutani;M. Koibuchi;Yutaka Yamada;D. Hsu;H. Amano
片上网络的拓扑探索对于有效地利用其巨大的线路资源以使用适度的硅预算进行低延迟和高吞吐量通信是重要的。在本文中，我们提出了一种新的基于树的互连网络称为胖H树，满足这些要求。胖H树通过组合两个折叠H树网络来提供环面结构，并且是微架构领域中基于树的网络（诸如胖树）的有吸引力的替代方案。我们介绍了其芯片布局方案的基础上折叠技术的2D和3D集成电路。针对胖H树提出了三种无死锁路由方案。我们使用真实的应用程序跟踪来评估Fat H-Tree和其他基于树的网络的性能。此外，与其他拓扑结构的网络逻辑区域，线资源，和能量消耗的脂肪H树进行了比较，基于一个典型的实现与90纳米标准单元库合成的片上路由器。结果表明：（1）胖H树在吞吐量和平均跳数方面优于具有两个向上和四个向下连接的胖树;（2）胖H树所需的网络逻辑面积比胖树小19.8%-27.8%;（3）胖H树消耗的能量比胖树略少，以及（4）胖H树使用比胖树稍多的线资源，但是当前的工艺技术可以提供足够的线资源用于实现基于胖H树的片上网络。
The topological explorations of on-chip networks are important for efficiently using their enormous wire resources for low-latency and high-throughput communications using a modest silicon budget. In this paper, we propose a novel tree-based interconnection network called Fat H-Tree that meets these requirements. A Fat H-Tree provides a torus structure by combining two folded H-Tree networks and is an attractive alternative to tree-based networks such as the Fat Trees in a microarchitecture domain. We introduce its chip layout schemes based on a folding technique for 2D and 3D ICs. Three deadlock-free routing schemes are proposed for Fat H-Tree. We evaluate the performance of Fat H-Tree and other tree-based networks using real application traces. In addition, the network logic area, wire resource, and energy consumption of Fat H-Tree are compared with other topologies, based on a typical implementation of on-chip routers synthesized with a 90-nm standard cell library. The results show that (1) a Fat H-Tree outperforms a Fat Tree with two upward and four downward connections in terms of the throughput and average hop count, (2) a Fat H-Tree requires 19.8 percent-27.8 percent smaller network logic area than the Fat Tree, (3) a Fat H-Tree consumes slightly less energy than the Fat Tree does, and (4) a Fat H-Tree uses slightly more wire resources than the Fat Tree, but the current process technology can provide sufficient wire resources for implementing Fat-H-Tree-based on-chip networks.