A technique for logic fault diagnosis of interconnect open defects

A technique for logic fault diagnosis of interconnect open defects
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一种互连线开路缺陷逻辑故障诊断技术

DOI:
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发表时间:
2000
期刊:
Proceedings of the ... IEEE VLSI Test Symposium
影响因子:
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通讯作者:
Scott Brady Drummonds
Scott Brady Drummonds
中科院分区:
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文献类型:
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作者:
S. Venkataraman;Scott Brady Drummonds

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提出了一种对导致数字逻辑电路中的互连开路或高电阻的缺陷进行逻辑诊断的技术。这项工作的新颖特点包括诊断故障模型,用于在存在开路缺陷的情况下捕获潜在的故障行为,以及利用诊断模型同时避免详细电路级 (SPICE) 仿真和寄生电容提取的需求的诊断算法。该技术的其他方面包括路径跟踪程序,以限制需要分析的互连数量以及针对多个缺陷的扩展。实验结果包括处理器功能块的仿真结果以及芯片组上人为引起的缺陷和生产影响的硅结果。
A technique to perform logic diagnosis of defects that cause interconnects in a digital logic circuit to become open or highly resistive is presented. The novel features of this work include a diagnostic fault model to capture potential faulty behaviors in the presence of an open defect and diagnosis algorithms that leverage the diagnostic model while circumventing the need for detailed circuit-level (SPICE) simulation and extraction of parasitic capacitance. Other aspects of the technique include a path-tracing procedure to limit the number of interconnects that need to be analyzed and extensions for multiple defects. Experimental results include simulation results on processor functional blocks and silicon results on a chipset from artificially induced defects and production fallout.