Adaptive Regression-Based Thermal Modeling and Optimization for Monolithic 3-D ICs
Adaptive Regression-Based Thermal Modeling and Optimization for Monolithic 3-D ICs
复制标题
DOI：
10.1109/tcad.2016.2523983
复制
发表时间：
2016-10
影响因子：
2.9
通讯作者：
S. Samal;Shreepad Panth;K. Samadi;Mehdi Saedi;Yang Du;S. Lim
中科院分区：
文献类型：
--
作者：
S. Samal;Shreepad Panth;K. Samadi;Mehdi Saedi;Yang Du;S. Lim
在本文中，我们首先对单片 3D 集成电路 (IC) 与基于硅通孔的 3D IC 的独特热行为进行了全面研究。特别是，我们研究了器件层之间的薄层间电介质对垂直热耦合的影响。然后，我们研究并比较不同基于应用的封装结构对单片 3D IC 热行为的影响。凭借这些独特的属性和行为，我们开发了一种基于非线性回归技术的快速、准确的紧凑型全芯片热分析模型，该模型在开发过程中适应封装结构，从而在温度评估过程中考虑它。我们的模型速度极快且高度准确，误差低于 5%。该模型被合并到热感知 3D 平面图器中，运行时不会产生大量运行时开销。我们将布局规划器与封装感知热模型结合使用，观察到最高温度降低了 22%，而面积和性能开销却微乎其微。
In this paper, we first present a comprehensive study of the unique thermal behavior in monolithic 3-D integrated circuits (ICs) in contrast to through silicon via-based 3-D ICs. In particular, we study the impact of the thin interlayer dielectric between the device tiers on vertical thermal coupling. We then study and compare the impact of different application-based package structures on the thermal behavior of monolithic 3-D ICs. With these unique properties and behavior, we develop a fast and accurate compact full-chip thermal analysis model based on nonlinear regression technique which adapts to the package structure during development and hence considers it during temperature evaluation. Our model is extremely fast and highly accurate with an error of less than 5%. This model is incorporated into a thermal-aware 3-D-floorplanner that runs without significant runtime overhead. We use the floorplanner with our package-aware thermal model and observe up to 22% reduction in the maximum temperature with insignificant area and performance overhead.