Reduced trapping effects and improved electrical performance in buried-gate 4H-SiC MESFETs

Reduced trapping effects and improved electrical performance in buried-gate 4H-SiC MESFETs
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DOI:
10.1109/ted.2003.814982
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发表时间:
2003-07-01
影响因子:
3.1
通讯作者:
Spencer, MG
Spencer, MG
中科院分区:
工程技术2区
文献类型:
--
作者:
Cha, HY;Thomas, CI;Spencer, MG

文献摘要

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相似文献

通过比较不同的表面结构,研究了表面效应对4 H-SiC MESFER电流不稳定性的影响。通过偏置扫描和电流恢复时间的测量,说明了电流不稳定现象。与非凹进和沟道凹进器件相比,观察到栅凹进和埋栅器件的电流不稳定性降低。此外,埋栅器件被发现有更高的电流密度和击穿电压相比,栅凹陷器件,导致其较短的有效栅极长度和较低的栅极下的电场分布,分别。埋栅结构具有高饱和电流、高击穿电压和表面效应小等优点,是大功率SiC MESFFET的一种候选结构。
Surface effects on the current instability of 4H-SiC MESFETs were studied by comparing different surface structures. The current instability phenomenon was illustrated by bias sweeping methods and current recovery time measurements. A reduction in the current instability was observed for gate-recessed and buried-gate devices compared to the nonrecessed and channel-recessed devices. In addition, the buried-gate devices were found to have higher current density and breakdown voltage compared to the gate-recessed devices, resulting from their shorter effective gate length and lower electric field distribution under the gate, respectively. With high saturation current, high breakdown voltage, and much reduced surface effects, the buried-gate structure is a candidate for high-power SiC MESFETs.