Bluespec: A language for hardware design, simulation, synthesis and verification Invited Talk

Bluespec: A language for hardware design, simulation, synthesis and verification Invited Talk
复制标题

Bluespec:一种用于硬件设计、仿真、综合和验证的语言 特邀演讲

DOI:
--
复制
发表时间:
2003
期刊:
International Conference on Formal Methods and Models for Co-Design
影响因子:
--
通讯作者:
Arvind
Arvind
中科院分区:
--
文献类型:
--
作者:
Arvind

文献摘要

被引文献

相似文献

Bluespec有一个基于原子行为的执行模型,这个模型与传统的硬件描述语言如Verilog、VHDL和SystemC有很大的不同,也与软件语言如C和Java有很大的不同。Bluespec基于麻省理工学院使用术语重写系统(TRS)进行硬件描述的研究,并由Sandburst公司开发成一种“工业实力”语言和编译器。Bluespec,因为它的执行模型,强类型,和面向对象,可以提高硬件设计的水平显着而不影响合成高效硬件的能力。在这个演讲中,我将概述如何以及为什么Bluespec通过给出微处理器和其他复杂芯片的例子来改进芯片设计过程。
Bluespec has an execution model based on atomic actions.This model is quite different from traditional hardwaredescription languages like Verilog, VHDL and SystemC.Its also different from software languages like C andJava. Bluespec is based on research at MIT in using TermRewriting Systems (TRS) for hardware descriptions and wasdeveloped into an "industrial strength" language and compilerby the Sandburst Corporation. Bluespec, because ofits execution model, strong typing, and object orientation,can raise the level of hardware design significantly withoutcompromising the ability to synthesize efficient hardware.In this talk I will outline how and why Bluespec improvesthe chip design process by giving examples from microprocessorand other complex chips.