Subthreshold Mismatch in Nanometer CMOS at Cryogenic Temperatures

Subthreshold Mismatch in Nanometer CMOS at Cryogenic Temperatures
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低温下纳米 CMOS 的亚阈值失配

DOI:
10.1109/essderc.2019.8901745
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发表时间:
2019
期刊:
ESSDERC 2019 - 49th European Solid-State Device Research Conference (ESSDERC)
影响因子:
--
通讯作者:
F. Sebastiano
F. Sebastiano
中科院分区:
--
文献类型:
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作者:
P. Hart;M. Babaie;E. Charbon;A. Vladimirescu;F. Sebastiano

文献摘要

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相似文献

低温器件模型对于实现大规模量子计算机的低温CMOS接口的可靠设计至关重要。在本文中,失配特性和建模的40纳米体CMOS工艺在4.2-300 K的温度范围内进行了研究,走向全工作区失配模型。示出了整体增加的可变性,特别是在亚阈值区域在低温下由于亚阈值斜率失配的急剧增加。强反演中的失配由Croon模型来模拟,而弱反演区域则通过考虑次阈值斜率变化来模拟。这导致第一模型能够在整个操作区域和温度范围内预测失配。
Cryogenic device models are essential for the reliable design of the cryo-CMOS interface that enables large-scale quantum computers. In this paper, mismatch characterization and modeling of a 40-nm bulk CMOS process over the 4.2–300 K temperature range is studied, towards an all-operating-region mismatch model. An overall increase of variability is shown, in particular in the subthreshold region at cryogenic temperatures due to a dramatic increase of the subthreshold slope mismatch. Mismatch in strong inversion is modeled by the Croon model while the weak-inversion region is modeled by taking subthresh-old slope variability into account. This results in the first model capable of predicting mismatch over the whole range of operating regions and temperatures.