Substrate biasing effects in a high-voltage, monolithically-integrated half-bridge GaN-Chip
Substrate biasing effects in a high-voltage, monolithically-integrated half-bridge GaN-Chip
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高压单片集成半桥 GaN 芯片中的衬底偏置效应
DOI：
10.1109/wipda.2017.8170558
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发表时间：
2017
期刊：
影响因子：
--
通讯作者：
and Dragan Maksimović
中科院分区：
文献类型：
--
作者：
B. Weiss;R. Reiner;V. Polyakov;P. Waltereit;R. Quay;O. Ambacher;and Dragan Maksimović
本文研究了衬底偏置效应的单片集成半桥级额定为600 V/20 A，并在横向AlGaN/GaN-on-Si技术制造。针对工作在400 V同步降压变换器中的单片半桥级，分析和解释了由公共衬底电位引起的导通电阻退化效应。对同一外延层上处理的非栅控TL M结构的详细分析支持对衬底偏置条件下的物理过程的理解。然后将获得的结果传输到半桥IC。最后，缓解技术进行了讨论，5 MHz，400 V至200 V的电源转换是在250 W的功率电平证明。
This paper investigates substrate biasing effects in a monolithically-integrated half-bridge stage rated for 600 V/20 A and fabricated in a lateral AlGaN/GaN-on-Si technology. On-resistance degradation effects caused by the common substrate potential are analyzed and explained for the monolithic half-bridge stage operating in a 400 V-synchronous buck converter. The detailed analysis of an ungated TLM-structure processed on the same epitaxial stack supports the understanding of physical processes during substrate bias conditions. The findings obtained are then transferred to the half-bridge IC. Finally, mitigation techniques are discussed, and 5 MHz, 400 V-to-200 V power conversion is demonstrated at a power level of 250 W.
影响因子：
3.1
作者：
Uren, Michael J.;Moereke, Janina;Kuball, Martin
通讯作者：
Kuball, Martin