Hardware IP Protection against Confidentiality Attacks and Evolving Role of CAD Tool
Hardware IP Protection against Confidentiality Attacks and Evolving Role of CAD Tool
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针对机密攻击的硬件 IP 保护以及 CAD 工具的角色演变
DOI：
10.1145/3508352.3561103
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发表时间：
2022
期刊：
影响因子：
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通讯作者：
Srivastava, Ankur
中科院分区：
文献类型：
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作者：
Bhunia, Swarup;Das, Amitabh;Fazzari, Saverio;Kammler, Vivian;Kehlet, David;Rajendran, Jeyavijayan;Srivastava, Ankur
随着越来越多地使用基于硬件知识产权 (IP) 的集成电路 (IC) 设计以及对全球化供应链的日益依赖，硬件 IP 机密性的威胁已成为 IP 生产者和所有者的主要安全问题。这些威胁多种多样，包括逆向工程 (RE)、盗版、克隆和设计机密提取，并且跨越电子产品生命周期的不同阶段。过去十年来，学术研究界和半导体行业在开发有效的方法和 CAD 工具方面做出了巨大努力，旨在保护硬件 IP 免受这些威胁。这些解决方案包括水印、逻辑锁定、混淆、伪装、分割制造和硬件编辑。本文重点讨论硬件 IP 机密性的关键主题，包括主要威胁、保护方法、安全分析和指标。它讨论了保护硬件 IP 免受机密攻击的主要解决方案的优势和局限性，以及解决现代供应链生态系统局限性的未来方向。
With growing use of hardware intellectual property (IP) based integrated circuits (IC) design and increasing reliance on a globalized supply chain, the threats to confidentiality of hardware IPs have emerged as major security concerns to the IP producers and owners. These threats are diverse, including reverse engineering (RE), piracy, cloning, and extraction of design secrets, and span different phases of electronics life cycle. The academic research community and the semiconductor industry have made significant efforts over the past decade on developing effective methodologies and CAD tools targeted to protect hardware IPs against these threats. These solutions include watermarking, logic locking, obfuscation, camouflaging, split manufacturing, and hardware redaction. This paper focuses on key topics on confidentiality of hardware IPs encompassing the major threats, protection approaches, security analysis, and metrics. It discusses the strengths and limitations of the major solutions in protecting hardware IPs against the confidentiality attacks, and future directions to address the limitations in the modern supply chain ecosystem.