Estimation of charge effects of ultrafine channel utilizing junctionless transistor with nanodot-type floating gate
Estimation of charge effects of ultrafine channel utilizing junctionless transistor with nanodot-type floating gate
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DOI:
10.7567/jjap.56.03bb05
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发表时间:
2017-02
影响因子:
1.5
通讯作者:
T. Ban;S. Migita;M. Uenuma;N. Okamoto;Y. Ishikawa;Y. Uraoka;I. Yamashita;Shin-ichi Yamamoto
中科院分区:
文献类型:
--
作者:
T. Ban;S. Migita;M. Uenuma;N. Okamoto;Y. Ishikawa;Y. Uraoka;I. Yamashita;Shin-ichi Yamamoto
Metal nanoparticles (NPs) embedded in junctionless field-effect transistors (JL-FETs) with a channel length of about sub-10-nm are fabricated and demonstrated. The anisotropic wet etching of a silicon-on-insulator (SOI) substrate was utilized to form V-grooves and define a nanometer-scale channel. Metal NPs are selectively placed onto the bottom of a V-groove using a bio nano process (BNP). A JL-FET is applied to a floating gate memory and used to study the impacts of charges close to the short channel. Low-voltage operation and memory behavior of broad threshold voltage appear. It is estimated by simulation that positive and negative charges equivalent to approximately 10 electrons are accumulated in one NP. It is expected that the JL-FETs can overcome the scaling limitations of floating gate memories.