CMOS transconductance multipliers:: A tutorial
CMOS transconductance multipliers:: A tutorial
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DOI：
10.1109/82.746667
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发表时间：
1998-12-01
影响因子：
4.4
通讯作者：
Sánchez-Sinencio, E
中科院分区：
文献类型：
--
作者：
Han, G;Sánchez-Sinencio, E
实时模拟信号乘法是模拟信号处理中最重要的运算之一。乘法器不仅用作计算构建块，而且还用作诸如滤波器、神经网络之类的系统中的编程元件，以及用作通信系统中的混频器和调制器。虽然高性能双极结型晶体管乘法器已经出现了一段时间，但CMOS乘法器的实现仍然是一个具有挑战性的课题，特别是对于低电压和低功耗电路设计。尽管有大量的论文提出了新的MOS乘法器结构，它们可以大致分为几类。本教程提供了一个完整的调查CMOS乘法器，提出了一个统一的一代乘法器架构，并提出了最推荐的MOS乘法器结构。本教程可作为比较新CMOS乘法器电路配置的起始参考点（和度量）。一个说明性的CMOS芯片原型验证理论结果。
Real-time analog multiplication of two signals is one of the mast important operations in analog signal processing. The multiplier is used not only as a computational building block but also as a programming element in systems such as filters, neural networks, and as mixers and modulators in a communication system. Although high performance bipolar junction transistor multipliers have been available for some time, the CMOS multiplier implementation is still a challenging subject especially for low-voltage and low-power circuit design. Despite the large number of papers proposing new MOS multiplier structures, they can be roughly grouped into a few categories. This tutorial provides a complete survey of CMOS multipliers, presents a unified generation of multiplier architectures, and proposes the most recommended MOS multiplier structure. This tutorial could serve as a starting reference point (and metric) for comparison of new CMOS multiplier circuit configurations. An illustrative CMOS chip prototype verifying theoretical results is presented.