A Tamper and Leakage Resilient von Neumann Architecture
A Tamper and Leakage Resilient von Neumann Architecture
复制标题
防篡改和泄漏的冯诺依曼架构
DOI:
10.1007/978-3-662-46447-2_26
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发表时间:
2015
期刊:
影响因子:
--
通讯作者:
D. Venturi
中科院分区:
文献类型:
--
作者:
Sebastian Faust;Pratyay Mukherjee;J. Nielsen;D. Venturi
We present a universal framework for tamper and leakage resilient computation on a random access machine (RAM). The RAM has one CPU that accesses a storage, which we call the disk. The disk is subject to leakage and tampering. So is the bus connecting the CPU to the disk. We assume that the CPU is leakage and tamper-free. For a fixed value of the security parameter, the CPU has constant size. Therefore the code of the program to be executed is stored on the disk, i.e., we consider a von Neumann architecture. The most prominent consequence of this is that the code of the program executed will be subject to tampering.