SAID: A Supergate-Aided Logic Synthesis Flow for Memristive Crossbars
SAID: A Supergate-Aided Logic Synthesis Flow for Memristive Crossbars
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SAID：忆阻交叉开关的超级门辅助逻辑合成流程
DOI：
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发表时间：
2019
期刊：
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通讯作者：
A. Calimera
中科院分区：
文献类型：
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作者：
V. Tenace;R. G. Rizzo;Debjyoti Bhattacharjee;A. Chattopadhyay;A. Calimera
忆阻器是一种两端器件，可用作具有内置逻辑功能的非易失性存储元件。内存阵列以纵横式结构排列，允许表示遵循内存中逻辑范例的复杂布尔逻辑函数，其中数据和逻辑门粘合在同一硬件上。不用说，为了实现实用和可行的硬件实现，需要新颖和特别的CAD解决方案。现有技术旨在考虑通过2输入NOR和NOT门描述的布尔逻辑函数的最佳映射策略，从而忽略了智能和专用技术感知的逻辑综合可以提供的优化能力。在这篇文章中，我们介绍了一种新的无库的超门辅助(SAID)逻辑综合方法，该方法采用了一种专门的映射策略，该策略是在魔术纵横杆上定制的。超级门是通过基于查找表(LUT)的合成来获得的，该合成将复杂的逻辑网络分割成更小的布尔函数。然后将这些功能映射到交叉开关阵列上，以最大限度地减少延迟。所提出的流程允许(I)最大限度地提高超门级并行性，从而减少计算周期总数；(Ii)放宽映射约束，允许布尔函数在记忆纵横杆上轻松而快速地映射。在ISCAS‘85和IWLS’93套件的几个基准测试上的实验结果表明，我们的方案能够以非常低的面积开销为代价，在加速比(最好情况下是3.89倍)方面优于其他最先进的技术。
A Memristor is a two-terminal device that can serve as a non-volatile memory element with built-in logic capabilities. Arranged in a crossbar structure, memristive arrays allow to represent complex Boolean logic functions that adhere to the logic-in-memory paradigm, where data and logic gates are glued together on the same piece of hardware. Needless to say, novel and ad-hoc CAD solutions are required to achieve practical and feasible hardware implementations. Existing techniques aim at optimal mapping strategies that account for Boolean logic functions described by means of 2-input NOR and NOT gates, thus overlooking the optimization capabilities that a smart and dedicated technology-aware logic synthesis can provide. In this paper, we introduce a novel library-free supergate-aided (SAID) logic synthesis approach with a dedicated mapping strategy tailored on MAGIC crossbars. Supergates are obtained with a Look-Up Table (LUT)-based synthesis that splits a complex logic network into smaller Boolean functions. Those functions are then mapped on the crossbar array as to minimize latency. The proposed SAID flow allows to (i) maximize supergate-level parallelism, thus reducing the total number of computing cycles, and (ii) relax mapping constraints, allowing an easy and fast mapping of Boolean functions on memristive crossbars. Experimental results obtained on several benchmarks from ISCAS’85 and IWLS’93 suites demonstrate that our solution is capable to outperform other state-of-the-art techniques in terms of speedup (3.89× in the best case), at the expense of a very low area overhead.