TMbox: A Flexible and Reconfigurable 16-Core Hybrid Transactional Memory System
TMbox: A Flexible and Reconfigurable 16-Core Hybrid Transactional Memory System
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TMbox:灵活且可重新配置的 16 核混合事务内存系统
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发表时间:
2011
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通讯作者:
M. Valero
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作者:
Nehir Sönmez;Oriol Arcas;Otto Pflucker;O. Unsal;A. Cristal;I. Hur;Satnam Singh;M. Valero
In this paper we present the design and implementation of TM box: An MPSoC built to explore trade-offs in multicore design space and to evaluate parallel programming proposals such as Transactional Memory (TM). Our flexible system, comprised of MIPS R3000-compatible cores is easily modifiable to study different architecture, library and operating system extensions. For this paper we evaluate a 16-core Hybrid Transactional Memory implementation based on the Tiny STM-ASF proposal on a Virtex-5 FPGA and we accelerate three benchmarks written to investigate TM.