ReversiSpec: Reversible Coherence Protocol for Defending Transient Attacks

ReversiSpec: Reversible Coherence Protocol for Defending Transient Attacks
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ReversiSpec:用于防御瞬态攻击的可逆一致性协议

DOI:
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发表时间:
2020
期刊:
arXiv.org
影响因子:
--
通讯作者:
Xuehai Qian
Xuehai Qian
中科院分区:
--
文献类型:
--
作者:
You Wu;Xuehai Qian

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最近的作品,例如Invisispec,Safespec和清理规格等,提供了有希望的解决方案,以捍卫猜测引起的(瞬态)攻击。但是,当投机载荷在重做方法中或在撤消方法中挤压时,它们会引入延迟。我们认为,这是由于缺乏基本机制来逆转缓存相干协议中投机的影响。基于主要是未修改的连贯协议,重做方法避免以双重负载为代价留下痕迹;撤消方法“阻止世界”恢复以避免干扰。本文为基本问题提供了第一个解决方案。具体来说,我们提出了ReversISPEC,这是一种减轻投机性诱导攻击的综合解决方案。ReversISPEC是一种可逆的方法,它在所有缓存级别中使用投机性缓冲区来记录投机性执行的效果。当投机载荷变得安全时,合并操作将投机执行的效果添加到全球状态。当挤压投机负载时,清除操作清除了投机缓冲液的缓冲投机执行状态。本文解决的关键问题是首次演示可逆的缓存相干协议,该协议自然会回滚被挤压的投机执行的效果。我们设计了两个混凝土一致性协议,分别是lazy和Reversicc-Eager,可提供相同的功能,并具有不同的权衡。我们的解决方案缩小了现代体系结构中的关键差距:就像倒退处理器内部投机效果的机制一样,ReversISPEC提供了回滚整个相干协议状态的机制。
The recent works such as InvisiSpec, SafeSpec, and Cleanup-Spec, among others, provided promising solutions to defend speculation induced (transient) attacks. However, they intro-duce delay either when a speculative load becomes safe in the redo approach or when it is squashed in the undo approach. We argue that it is due to the lack of fundamental mechanisms for reversing the effects of speculation in a cache coherence protocol. Based on mostly unmodified coherence protocol, the redo approach avoids leaving trace at the expense of double loads; the undo approach "stops the world" in recovery to avoid interference. This paper provides the first solution to the fundamental problem. Specifically, we propose ReversiSpec, a comprehensive solution to mitigate speculative induced attacks.ReversiSpec is a reversible approach that uses speculative buffers in all cache levels to record the effects of speculative execution. When a speculative load becomes safe, a merge operation adds the effects of speculative execution to the global state. When a speculative load is squashed, a purge operation clears the buffered speculative execution states from speculative buffer. The key problem solved by the paper is the first demonstration of a reversible cache coherence protocol that naturally rollbacks the effects of squashed speculative execution. We design two concrete coherence protocols, ReversiCC-Lazy and ReversiCC-Eager providing the same functionality with different trade-offs. Our solution closes a crucial gap in modern architecture: just like the mechanisms to roll back the speculation effects inside a processor, ReversiSpec provides the mechanisms to roll back the state of the whole coherence protocol.
DOI: 10.1145/3411504.3421216
发表时间: 2020-03
期刊: Proceedings of the 4th ACM Workshop on Attacks and Solutions in Hardware Security
影响因子: --
作者:
Jacob Fustos;M. Bechtel;H. Yun
通讯作者: Jacob Fustos;M. Bechtel;H. Yun
DOI: 10.1109/isca45697.2020.00022
发表时间: 2019-11
期刊: 2020 ACM/IEEE 47th Annual International Symposium on Computer Architecture (ISCA)
影响因子: --
作者:
S. Ainsworth;Timothy M. Jones
通讯作者: S. Ainsworth;Timothy M. Jones