Silicon interposer and TSV signaling

Silicon interposer and TSV signaling
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硅中介层和 TSV 信号传输

DOI:
10.1109/ectc.2015.7159603
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发表时间:
2015
期刊:
2015 IEEE 65th Electronic Components and Technology Conference (ECTC)
影响因子:
--
通讯作者:
J. Drew
J. Drew
中科院分区:
--
文献类型:
--
作者:
A. Martwick;J. Drew

文献摘要

被引文献

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硅中介层和硅通孔是目前正在准备投入生产的新技术。这项研究检查了电气和时序模型,以预测该技术的扩展速度。我们证明了 W.C. 首先引入的指标。 Elmore 级联低通元件的延迟和带宽计算为互连信号完整性提供了出色的预测。通过应用简单的传输均衡器,我们表明 6 毫米链路将扩展到超过 6 Gb/s。为了支持缩放计算,我们回顾了用于计算接收器的时序预算以实现 0 误码率的时序抖动模型。这项技术需要如此详细的模型,因为几何尺寸太小而无法直接测量,必须通过设计来保证并通过余量测试来确认。
Silicon interposers and through silicon vias are new technologies that are currently being readied for production. This research examines the electrical and timing models to predict how fast this technology will scale. We show that the metrics first introduced by W.C. Elmore to the delay and bandwidth calculations of cascaded low pass elements provide excellent predictions for the interconnect signal integrity. By applying a simple transmit equalizer we show that 6 mm links will scale to over 6 Gb/s. To support the scaling calculations we review the timing jitter model that is used to calculate the timing budget at the receiver to achieve a 0 bit error rate. This technology requires such a detailed model because the geometry is too small to allow direct measurements, it must be guaranteed by design and confirmed by margin testing.