Interfacial charge phenomena at the semiconductor/gate insulator interface in organic field effect transistors
Interfacial charge phenomena at the semiconductor/gate insulator interface in organic field effect transistors
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DOI：
10.1016/j.tsf.2005.07.028
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发表时间：
2006-03-21
期刊：
影响因子：
2.1
通讯作者：
Miyairi, K
中科院分区：
文献类型：
--
作者：
Itoh, E;Miyairi, K
研究了在高介电常数（约20）的氧化钽上制备的区域规则的聚（3-己基噻吩）（P3 HT）或铜酞菁（CuPc）p型半导体层以及氧化钽和聚酰亚胺薄膜的双层结构的金属-绝缘体-半导体（MIS）电容器的电学特性。这些结果结合场效应晶体管（FET）的性能和传统的表面电位测量和讨论的界面电容和电荷交换现象在半导体/绝缘体界面。研究发现，用Ta_2 O_5作为栅绝缘层不仅是降低FET工作电压的有效方法，而且也是研究半导体/栅绝缘层界面上几个纳米范围内的界面电容的有效方法。结合传统的电容测量方法和场效应晶体管特性中的阈值电压，讨论了与场效应晶体管特性密切相关的界面陷阱密度。(c)2005 Elsevier B. V.保留所有权利。
We have investigated the electrical characteristics of metal-insulator-semiconductor (MIS) capacitors consisting of p-type semiconductor layer, either regio-regular poly(3-hexylthiophene) (P3HT) or copper-phthalocyanine (CuPc) prepared on tantalum oxide, with a high dielectric constant (similar to 20), or double layered structure consisting of tantalum oxide and polyimide thin films. These results are combined with field effect transistor (FET) properties and conventional surface potential measurements and discussed in terms of the interfacial capacitance and charge exchange phenomena at the semiconductor/insulator interface. It was found that the use of Ta2O5 as a gate insulator is not only an effective way to reduce operating voltage of FET but also a useful way to investigate the interfacial capacitance which exists within a few nanometers at the semiconductor/gate insulator interface. The interfacial trap density, which is deeply associated with FET properties, was also discussed, taking into account the conventional capacitance measurement and the threshold voltage in FET properties. (c) 2005 Elsevier B.V. All rights reserved.