Novel Power Loss Limit Analysis Method for High-speed, Ultra-low Loss Power Converter

Novel Power Loss Limit Analysis Method for High-speed, Ultra-low Loss Power Converter
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高速、超低损耗电源转换器的新型损耗极限分析方法

DOI:
10.1109/pesc.2005.1581938
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发表时间:
2005
期刊:
2005 IEEE 36th Power Electronics Specialists Conference
影响因子:
--
通讯作者:
H. Ohashi
H. Ohashi
中科院分区:
--
文献类型:
--
作者:
K. Takao;K. Adachi;Y. Hayashi;H. Ohashi

文献摘要

被引文献

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为了设计未来的高速、超低损耗变换器,提出了一种新的功率损耗极限分析方法。该方法的概念由三部分组成。它们是(1)利用电路杂散参数可调的电路板进行功率损耗测量,(2)利用测量结果将功率损耗分离成功率损耗因子,(3)功率损耗因子的参数提取。所提出的方法的优点是在实际工作条件下的功率损耗极限估计和高OPD转换器的设计包括电路杂散参数的影响。为了验证该方法的有效性,分析了由Si-MOSFET和SiC-SBD构成的高速开关斩波电路中的功率器件损耗。该方法已成功地提取了功率损耗因子。利用分析结果对功率损耗因子的特性进行了建模。建立了基于功率损耗因子的功率器件损耗极限模型。利用功率器件损耗模型对功率器件损耗进行了预测。预测的功率器件损耗与实验测量的功率损耗吻合较好
Novel power loss limit analysis method has been developed for designing future high-speed, ultra-low loss converters. The concept of the method is consisted by 3 parts. They are (1) power loss measurement with a circuit stray parameter adjustable circuit board, (2) separation of power loss into power loss factors by using measurement results and (3) parameter extraction of power loss factors. Advantages of the proposed method are power loss limit estimation under practically operating conditions and a high OPD converter design including influences of circuit stray parameters. To verify an effectiveness of the method, power device loss in a high-speed switching chopper circuit constructed with a Si-MOSFET and a SiC-SBD has been analyzed. The method has successfully extracted power loss factors. Characteristics of power loss factors are modeled by using analysis results. A power device loss limit model is newly established based on power loss factors. Power device losses have been predicted by using the power device loss model. The predicted power device losses are in good agreement with the power losses measured by experiments