A concatenation scheme of LDPC codes and source codes for flash memories

A concatenation scheme of LDPC codes and source codes for flash memories
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一种用于闪存的 LDPC 码和源代码的级联方案

DOI:
10.1186/1687-6180-2012-208
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发表时间:
2012-09
影响因子:
1.9
通讯作者:
Zulin Wang
Zulin Wang
中科院分区:
工程技术4区
文献类型:
--
作者:
Qin Huang;Song Pan;Mu Zhang;Zulin Wang

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近来,低密度奇偶校验(LDPC)码已经应用于闪存中以校正错误。然而,正如本文所验证的,它们的性能随着卡住单元数量的增加而迅速下降。因此,本文提出了一种LDPC码和源代码的级联可靠性方案,旨在提高LDPC码在具有卡住单元的闪存中的性能。在该方案中,在写过程中由源代码记录卡住单元的位置,使得在读过程中给出这些单元上的擦除而不是错误的对数似然比。然后,LDPC码纠正这些擦除和软错误所造成的小区到小区的干扰。对信道容量和带边信息的信源压缩比的分析表明,该方案的存储开销较低。仿真结果表明,该方案优于传统的方案只有LDPC码。
Recently, low-density parity-check (LDPC) codes have been applied in flash memories to correct errors. However, as verified in this article, their performance degrades rapidly as the number of stuck cells increases. Thus, this paper presents a concatenation reliability scheme of LDPC codes and source codes, which aims to improve the performance of LDPC codes for flash memories with stuck cells. In this scheme, the locations of stuck cells is recorded by source codes in the write process such that erasures rather than wrong log-likelihood ratios on these cells are given in the read process. Then, LDPC codes correct these erasures and soft errors caused by cell-to-cell interferences. The analyses of channel capacity and compression rates of source codes with side information show that the memory cost of the proposed scheme is moderately low. Simulation results verify that the proposed scheme outperforms the traditional scheme with only LDPC codes.
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