Normal Optical Flow measurement on a CMOS APS imager

Normal Optical Flow measurement on a CMOS APS imager
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CMOS APS 成像仪上的正常光流测量

DOI:
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发表时间:
2004
期刊:
2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512)
影响因子:
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通讯作者:
R. Etienne
R. Etienne
中科院分区:
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文献类型:
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作者:
S. Mehta;R. Etienne

文献摘要

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本文介绍了一种在0.5 μ/mCMOS工艺中实现的二维密集法向光流测量芯片的结果。该芯片具有92/spl times/52阵列的APS像素,占地面积为4.5 mm/sup 2/,功耗为2.6 mW。为了说明芯片的操作,我们先介绍各个块的结果,然后介绍整个结构。我们还证明了在不影响处理的情况下将芯片扩展到更高分辨率的可行性。
Results from a 2-D dense Normal Optical Flow measurement chip implemented in 0.5 /spl mu/m CMOS process are presented. The chip has a 92/spl times/52 array of APS pixels, occupies an area of 4.5 mm/sup 2/ and consumes 2.6 mW power. To illustrate the operation of the chip, we present the results of individual blocks and then the whole structure. We also demonstrate the feasibility of scaling the chip to higher resolutions without affecting the processing.