Energy estimation and optimization of embedded VLIW processors based on instruction clustering
Energy estimation and optimization of embedded VLIW processors based on instruction clustering
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基于指令聚类的嵌入式VLIW处理器能耗估算与优化
DOI：
10.1109/dac.2002.1012747
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发表时间：
2002
期刊：
影响因子：
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通讯作者：
R. Zafalon
中科院分区：
文献类型：
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作者：
A. Bona;M. Sami;D. Sciuto;V. Zaccaria;C. Silvano;R. Zafalon
本文的目的是提出一种定义超长指令字处理器的指令级能量估计框架的方法。功率建模方法是为最先进的ILP（指令级并行）处理器定义有效的能量感知软件优化策略的关键问题。该方法基于VLIW处理器的能量模型，该模型利用指令聚类来实现高效和细粒度的能量估计。该方法旨在将VLIW处理器表征问题的复杂性从指数级（相对于同一条非常长的指令中并行操作的数量）降低到二次级（相对于指令集群的数量）。在此基础上，提出了一种基于同一长指令内并行操作低功耗重排序的空间调度算法。实验结果在HPLabs和意法半导体共同设计的4期VLIW核心Lx处理器上进行。结果表明，基于聚类的估计模型与参考设计的平均误差为1.9%，标准差为5.8%。对于Lx架构，空间指令调度算法平均节能12%。
Aim of this paper is to propose a methodology for the definition of an instruction-level energy estimation framework for VLIW (very long instruction word) processors. The power modeling methodology is the key issue to define an effective energy-aware software optimisation strategy for state-of-the-art ILP (instruction level parallelism) processors. The methodology is based on an energy model for VLIW processors that exploits instruction clustering to achieve an efficient and fine grained energy estimation. The approach aims to reduce the complexity of the characterization problem for VLIW processors from exponential, with respect to the number of parallel operations in the same very long instruction, to quadratic, with respect to the number of instruction clusters. Furthermore, the paper proposes a spatial scheduling algorithm based on a low-power reordering of the parallel operations within the same long instruction. Experimental results have been carried out on the Lx processor, a 4-issue VLIW core jointly designed by HPLabs and STMicroelectronics. The results have shown an average error of 1.9% between the cluster-based estimation model and the reference design, with a standard deviation of 5.8%. For the Lx architecture, the spatial instruction scheduling algorithm provides an average energy saving of 12%.