Energy efficient bootstrapped CMOS inverter for ultra-low power applications
Energy efficient bootstrapped CMOS inverter for ultra-low power applications
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DOI：
10.1109/icecs.2016.7841252
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发表时间：
2016-12
期刊：
影响因子：
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通讯作者：
Mohammed Al-daloo;A. Yakovlev;Basel Halak
中科院分区：
文献类型：
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作者：
Mohammed Al-daloo;A. Yakovlev;Basel Halak
本文描述了一种适用于超低功耗应用的高能效自举CMOS逆变器。所提出的设计是通过内部提升晶体管的栅极电压(通过电荷泵浦技术)来实现的，并且工作区域从亚阈值转移到更高的区域，从而增强了性能并提高了对PVT变化的容忍度。尽管所提出的自举驱动器在低于阈值的电源下工作，但它通过利用两级来使用较少的晶体管来工作在该区域。第一级是具有PMOS和NMOS晶体管的普通驱动器，由增强电压电路(第二级)驱动，该电路在理论上产生−Vdd之间的电压电平，以拉高到2Vdd用于下拉。我们的分析表明，在0.15V VDD的电源电压下，与传统设计相比，所提出的实现方案的能耗降低了约20%。
This paper describes an energy efficient boot-strapped CMOS inverter for ultra-low power applications. The proposed design is achieved by internally boosting the gate voltage of the transistors (via the charge pumping technique), and the operating region is shifted from the sub-threshold to a higher region, enhancing performance and improving tolerance to PVT variations. Despite the proposed bootstrapped driver operates with a sub-threshold power supply it uses fewer transistors engaging in this region by utilizing two stages. The first stage is a normal driver with PMOS and NMOS transistors that are driven by the enhancing voltage circuit (stage 2) which generates voltage levels theoretically between −VDD for pulling up to 2Vdd for pulling down. Our analysis shows that the proposed implementation achieves around 20% reduction in energy consumption compared to conventional designs under a supply voltage of 0.15V VDD.