High mobility strained germanium quantum well field effect transistor as the p-channel device option for low power (Vcc = 0.5 V) III–V CMOS architecture
High mobility strained germanium quantum well field effect transistor as the p-channel device option for low power (Vcc = 0.5 V) III–V CMOS architecture
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DOI:
10.1109/iedm.2010.5703312
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发表时间:
2010-12
期刊:
影响因子:
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通讯作者:
R. Pillarisetty;B. Chu-Kung;S. Corcoran;G. Dewey;J. Kavalieros;H. Kennel;R. Kotlyar;V. Le;
中科院分区:
文献类型:
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作者:
R. Pillarisetty;B. Chu-Kung;S. Corcoran;G. Dewey;J. Kavalieros;H. Kennel;R. Kotlyar;V. Le;
In this article we demonstrate a Ge p-channel QWFET with scaled TOXE = 14.5Å and mobility of 770 cm2/V*s at ns =5×1012 cm−2 (charge density in the state-of-the-art Si transistor channel at Vcc = 0.5V). For thin TOXE < 40 Å, this represents the highest hole mobility reported for any Ge device and is 4× higher than state-of-the-art strained silicon. The QWFET architecture achieves high mobility by incorporating biaxial strain and eliminating dopant impurity scattering. The thin TOXE was achieved using a Si cap and a low Dt transistor process, which has a low oxide interface Dit. Parallel conduction in the SiGe buffer was suppressed using a phosphorus junction layer, allowing healthy subthreshold slope in Ge QWFET for the first time. The Ge QWFET achieves an intrinsic Gmsat which is 2× higher than the InSb p-channel QWFET [3]. These results suggest the Ge QWFET is a viable p-channel option for non-silicon CMOS.