A pixel-parallel image processor for Gabor filtering based on merged analog/digital architecture
A pixel-parallel image processor for Gabor filtering based on merged analog/digital architecture
复制标题
基于模拟/数字融合架构的像素并行Gabor滤波图像处理器
DOI：
10.1109/vlsic.2004.1346563
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发表时间：
2004
期刊：
影响因子：
--
通讯作者：
A. Iwata
中科院分区：
文献类型：
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作者：
Takashi Morie;Jun Umezawa;A. Iwata
Gabor滤波是一种用于图像识别的强有力的特征提取方法。我们提出了一个像素并行处理器的Gabor滤波使用一个新开发的算法与最近邻连接。LSI设计采用0.35 /spl μ/m CMOS技术，基于合并的模拟/数字电路架构，它使用脉宽调制（PWM）信号。该LSI包括62/spl倍/71像素电路在一个9.8平方毫米。芯片面积使用所制造的LSI的实验已经验证了图像的空间频率被正确地提取。
Gabor filtering is a powerful feature extraction method for image recognition. We propose a pixel-parallel processor for Gabor filtering using a newly developed algorithm with nearest-neighbor connections. The LSI has been designed using 0.35 /spl mu/m CMOS technology based on the merged analog/digital circuit architecture, which uses pulse-width modulation (PWM) signals. The LSI includes 62/spl times/71 pixel circuits on a 9.8 mm sq. chip area. Experiments using the fabricated LSI have verified that the spatial frequency of the image is correctly extracted.