Well-Posed Verilog-A Compact Model for Phase Change Memory
Well-Posed Verilog-A Compact Model for Phase Change Memory
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DOI：
10.1109/sispad.2018.8551667
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发表时间：
2018-09
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影响因子：
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通讯作者：
Shruti R. Kulkarni;Deepak Kadetotad;Jae-sun Seo;B. Rajendran
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文献类型：
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作者：
Shruti R. Kulkarni;Deepak Kadetotad;Jae-sun Seo;B. Rajendran
在这项工作中，我们展示了基于 Ge2 Sb2 Te5（GST）硫族化物的相变存储器（PCM）器件的适定紧凑模型。该模型支持所有仿真模式，包括瞬态、直流和交流。该模型采用 Verilog-A 开发并使用 HSPICE 进行仿真。它计算简单，并成功捕获存储器开关的关键高级行为，包括电阻对编程电压、电流和脉冲时间尺度的依赖性。
In this work, we demonstrate a well-posed compact model for phase change memory (PCM) devices based on Ge2 Sb2 Te5, (GST) chalcogenide. This model supports all modes of simulation including transient, DC, and AC. The model is developed in Verilog-A and simulated using HSPICE. It is computationally simple and successfully captures the key high level behaviors of memory switching, including the resistance dependence on programming voltages, currents and pulse time-scales.