(Invited) Low Power Tunneling FET Technologies Using Ge/III-V Materials
(Invited) Low Power Tunneling FET Technologies Using Ge/III-V Materials
复制标题
(特邀)使用Ge/III-V材料的低功耗隧道FET技术
DOI：
10.1149/08004.0115ecst
复制
发表时间：
2017
期刊：
影响因子：
--
通讯作者：
Takenaka Mitsuru
中科院分区：
文献类型：
--
作者：
Takagi Shinichi;Ahn Dae-Hwan;Noguchi Munetaka;Yoon Sanghee;Gotow Takahiro;Nishi Koichi;Kim Minsoo;Bae Tae-Eon;Katoh Takumi;Matsumura Ryo;Takaguchi Ryotaro;Takenaka Mitsuru
本文讨论了使用III-V族半导体和Ge的隧道FET（TFET）的关键问题、技术挑战和可行技术。总结了提高薄膜晶体管性能所不可缺少的器件工程，重点介绍了源结形成技术。作为可行的例子，给出了使用InGaAs体和量子阱（QW）同质结、GaAsSb/InGaAs II型异质结、Ge同质结和Ge/应变SOI II型异质结的TFFET的制备和电学特性。
The critical issues, technical challenges and viable technologies of tunneling FETs (TFET) using III-V semiconductors and Ge are addressed in this paper. Device engineering indispensable in improving the performance of TFETs is summarized with emphasis on the source junction formation technology. The fabrication and the electrical characteristics of TFETs using InGaAs bulk and quantum well (QW) homo-junctions, GaAsSb/InGaAs type-II hetero-junctions, Ge homo junctions and Ge/strained SOI type-II hetero-junction are presented as viable examples.