Jitter-based Adaptive True Random Number Generation Circuits for FPGAs in the Cloud
Jitter-based Adaptive True Random Number Generation Circuits for FPGAs in the Cloud
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DOI：
10.1145/3487554
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发表时间：
2023-03-01
影响因子：
2.3
通讯作者：
Holcomb, Daniel
中科院分区：
文献类型：
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作者：
Li, Xiang;Stanwicks, Peter;Holcomb, Daniel
在本文中，我们介绍并评估了一种真随机数生成器（TRNG）设计，该设计与基于云的现场可编程门阵列（FPGA）提供商（如AmazonWeb Services（AWS）EC2 F1）施加的限制兼容。由于云FPGA提供商不允许传统上生成TRNG熵的环形振荡器电路，因此我们的设计是无振荡器的，并使用时钟抖动作为其熵源。时钟抖动通过时间数字转换器（TDC）和可控延迟线获得，该延迟线可连续调谐以补偿工艺、电压和温度变化。在描述了设计之后，我们提出并验证了一个保守量化其最坏情况熵的随机模型。我们在60个EC2 F1 FPGA实例上的云中部署和建模设计，以确保捕获足够的随机性。使用NIST测试套件进一步验证TRNG熵，并执行实验以了解TRNG如何响应于干扰TRNG附近的FPGA电源电压的管芯上功率攻击。在介绍并验证了我们的基本TRNG设计之后，我们介绍并验证了一个新的变体，该变体使用四个重复采样模块的实例来增加每个样本的熵并提高吞吐量。新变体在CLB计数适度增加17%的情况下将吞吐量提高了250%。
In this article, we present and evaluate a true random number generator (TRNG) design that is compatible with the restrictions imposed by cloud-based Field Programmable Gate Array (FPGA) providers such as AmazonWeb Services (AWS) EC2 F1. Because cloud FPGA providers disallow the ring oscillator circuits that conventionally generate TRNG entropy, our design is oscillator-free and uses clock jitter as its entropy source. The clock jitter is harvested with a time-to-digital converter (TDC) and a controllable delay line that is continuously tuned to compensate for process, voltage, and temperature variations. After describing the design, we present and validate a stochastic model that conservatively quantifies its worst-case entropy. We deploy and model the design in the cloud on 60 EC2 F1 FPGA instances to ensure sufficient randomness is captured. TRNG entropy is further validated using NIST test suites, and experiments are performed to understand how the TRNG responds to on-die power attacks that disturb the FPGA supply voltage in the vicinity of the TRNG. After introducing and validating our basic TRNG design, we introduce and validate a new variant that uses four instances of a linkable sampling module to increase the entropy per sample and improve throughput. The new variant improves throughput by 250% at a modest 17% increase in CLB count.