Identification and Application of Invariant Critical Paths under NBTI Degradation
Identification and Application of Invariant Critical Paths under NBTI Degradation
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DOI：
10.1587/transfun.e100.a.2797
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发表时间：
2017-12
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影响因子：
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通讯作者：
S. Bian;Shumpei Morita;Michihiro Shintani;H. Awano;Masayuki Hiromoto;Takashi Sato
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文献类型：
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作者：
S. Bian;Shumpei Morita;Michihiro Shintani;H. Awano;Masayuki Hiromoto;Takashi Sato
随着半导体器件技术的进一步发展，老化引起的器件退化已成为器件可靠性的主要威胁之一。此外，已知负偏置温度不稳定性（NBTI）等老化机制对工作负荷（即信号概率）敏感，这在设计阶段很难假设。在此工作中，我们分析了使用处理器的NBTI退化的工作负载依赖性，并提出了一种新的估计最坏情况路径的技术。在我们的方法中，我们利用电路结构的确定性限制了NBTI在不同路径上的退化量，并提出了一种两阶段路径提取算法来识别处理器中的不变关键路径（icp）。利用这些路径，我们还提出了一种优化技术来替代内部节点控制逻辑，以减轻设计中的NBTI退化。通过对两种处理器设计的数值实验，我们在两种设计上的路径数量都减少了近300倍。利用提取的icp，我们实现了96 - 197x的加速，而没有损失缓解增益。
SUMMARY As technology further scales semiconductor devices, aging-induced device degradation has become one of the major threats to device reliability. In addition, aging mechanisms like the negative bias temperature instability (NBTI) are known to be sensitive to workload (i.e., signal probability) that is hard to be assumed at design phase. In this work, we analyze the workload dependence of NBTI degradation using a processor, and propose a novel technique to estimate the worst-case paths. In our approach, weexploitthefactthatthedeterministicnatureofcircuitstructure limits the amount of NBTI degradation on different paths, and propose a two-stage path extraction algorithm to identify the invariant critical paths (ICPs) in the processor. Utilizing these paths, we also propose an opti- mization technique for the replacement of internal node control logic that mitigates the NBTI degradation in the design. Through numerical experi- ment on two processor designs, we achieved nearly 300x reduction in the sheer number of paths on both designs. Utilizing the extracted ICPs, we achieved 96x–197x speedup without loss in mitigation gain.