Variable threshold-voltage SOI CMOSFETs with implanted back-gate electrodes for power-managed low-power and high-speed sub-1-V ULSIs
Variable threshold-voltage SOI CMOSFETs with implanted back-gate electrodes for power-managed low-power and high-speed sub-1-V ULSIs
复制标题
具有植入背栅电极的可变阈值电压 SOI CMOSFET，适用于电源管理的低功耗和高速低于 1V ULSI
DOI：
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发表时间：
1996
期刊：
影响因子：
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通讯作者：
D. Hisamoto
中科院分区：
文献类型：
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作者：
T. Kachi;T. Kaga;S. Wakahara;D. Hisamoto
提出了一种具有可变阈值电压(V/SUB TH/)的SOI CMOSFET，用于制作功率管理的低功耗和高速亚1V ULSI。采用0.5/SPLmU/m工艺制作了一个具有0.7/spl mU/m长门和可变Vu函数的实验SOI CMOS环形振荡器，在1V工作条件下，在相同的功耗下，其传输延迟比体块CMOS缩短46%，比传统SOI CMOS缩短29%。这些显著的改进归功于SOI CMOSFET的0.5V以下可变V/SUB TH/和更大的漏极电流。
An SOI CMOSFET with a variable threshold-voltage (V/sub th/) is proposed for fabricating power-managed low-power and high-speed sub-1-V ULSIs. An experimental SOI CMOS ring-oscillator with 0.7-/spl mu/m-long gates and a variable-Vu, function, fabricated using 0.5-/spl mu/m processes, showed 46% shorter propagation delay than that for bulk CMOSs and 29% shorter delay than that for conventional SOI CMOS under 1-V-operation with almost the same power consumption. These remarkable improvements result from the 0.5-V-lower variable V/sub th/ and larger drain current of the SOI CMOSFET.