Workload dependent NBTI and PBTI analysis for a sub-45nm commercial microprocessor
Workload dependent NBTI and PBTI analysis for a sub-45nm commercial microprocessor
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针对 45 纳米以下商用微处理器的工作负载相关 NBTI 和 PBTI 分析
DOI：
10.1109/irps.2013.6531971
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发表时间：
2013
期刊：
影响因子：
--
通讯作者：
R. Dutton
中科院分区：
文献类型：
--
作者：
E. Mintarno;V. Chandra;D. Pietromonaco;R. Aitken;R. Dutton
本文分析了衰老的效果，以下是45nm商业处理器运行现实的应用程序。通过单独老化的每个晶体管来创建一个用于设计中的单元格的标准库。 - 相对于一次性最差的守卫方法，可以证明 - 调整。
This paper analyzes aging effects on various design hierarchies of a sub-45nm commercial processor running realistic applications. Dependencies of aging effects on switching-activity and power-state of workloads are quantified. This paper presents an “instance-based” simulation flow, which creates a standard-cell library for each use of the cell in the design, by aging each transistor individually. Implementation results show that processor timing degradation can vary from 2% to 11%, depending on workload. Lifetime computational power efficiency improvements of optimized self-tuning is demonstrated, relative to a one-time worst-case guardbanding approach.