Modeling of grain boundary barrier modulation in ZnO invisible thin film transistors
Modeling of grain boundary barrier modulation in ZnO invisible thin film transistors
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DOI：
10.1016/j.physe.2003.11.149
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发表时间：
2004-03-01
影响因子：
3.3
通讯作者：
Kawasaki, M
中科院分区：
文献类型：
--
作者：
Hossain, FM;Nishii, J;Kawasaki, M
我们模拟了多晶ZnO薄膜晶体管（TFT）的晶界（GB）。实验结果表明，随着栅偏压的增加，漏电流呈非线性增加，场效应迁移率逐渐增大。我们最初的单GB模型无法解释实验获得的结果，我们认为在中间间隙的峰值缺陷分布。从实验获得的结果中认识到，考虑到导带附近的峰分布，我们对晶界进行了重新建模，从而更好地复制了实验观察。我们描述了实验ZnO TFT在线性区的传输特性，并计算了电势分布。适当的晶界模型表明，晶界势垒的缓慢下降与施加的栅极电压是负责这种非线性变化的漏极电流和迁移率的逐渐增强。(C)2003 Elsevier B.V.保留所有权利。
We model grain boundaries (GBs) for polycrystalline ZnO thin film transistors (TFTs). Experimental result shows a non-linear increase of drain current and gradual enhancement of field effect mobility with increasing gate bias. Our initial single GB model was unable to explain the experimentally obtained results, where we considered the peak defect distribution at the mid gap. Realizing from the experimentally obtained results, we remodeled the grain boundary considering the peak distribution close to the conduction band, which then better replicates the experimental observation. We describe here the transfer characteristic of experimental ZnO TFT in linear region with calculated potential profiles. Appropriate grain boundary modeling signifies that the slower decrease in potential barrier in grain boundary with applied gate voltage is responsible for such non-linear changes in drain current and gradual enhancement of mobility. (C) 2003 Elsevier B.V. All rights reserved.