Development of electro-optical PCBs with embedded waveguides for data center and high performance computing applications
Development of electro-optical PCBs with embedded waveguides for data center and high performance computing applications
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开发用于数据中心和高性能计算应用的嵌入式波导电光 PCB
DOI：
10.1117/12.2039875
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发表时间：
2014
影响因子：
4.7
通讯作者：
T. Rapala‐Virtanen
中科院分区：
文献类型：
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作者：
M. Immonen;J. Wu;H. J. Yan;L. Zhu;P. Chen;T. Rapala‐Virtanen
在下一代数据中心(DC)和高性能计算(HPC)应用中，功耗以及扩展用于主板和背板内数据流量的电气互连的性能和数量是设想的关键障碍之一。本文报道了嵌入聚合物波导层的电光印制电路板(EO-PCB)的研究进展。我们展示了制造实际产品仿真器测试车辆的结果，这些测试车辆由具有光学和电学层的合理形状因数的印刷电路板组成。光学层由多个波导所组成，表现出满足实际光路由功能所需的各种几何构型。测试图案包括不同的横截面尺寸、不同半径(40 mm-2 mm)的90°弯曲、不同半径的级联弯曲、不同交叉角(90°-20°)的波导交叉、分路器、锥形波导和连接到板中界面缝隙的波导互连。此外，还给出了在OE-PCB堆栈中制造电互连结构(例如，跟踪层、通孔、电镀通孔)的结果。复杂布线铜层的目的是能够关键地展示具有光学层的电光印刷电路板固有的制造和热稳定性挑战。与公认实践的工艺兼容性和大规模生产中的挑战是实现产量目标和成本效率的关键问题。结果包括波导特性、波导传输损耗、失调容差和叠层效应。此外，我们还给出了采用面内边缘连接器和90°离面耦合器的波导终端的结果。
Power consumption and scaling the performance and quantity of electrical interconnects for data traffic inside boards and backplanes are one of the critical barriers envisaged in next‐generation Data Center (DC) and High‐Performance Computing (HPC) applications. In this paper, we report developments of electro-optical PCBs (EO-PCB) with embedded polymer waveguide layers. We show results for fabricating realistic product emulator test vehicles that comprise of reasonable form factor PCBs with optical and electrical layers. The optical layer comprise of multiple waveguides exhibiting a full range of geometric configurations required to meet practical optical routing functions. Test patterns include varied cross-sectional sizes, 90° bends of varying radii (40mm – 2mm), cascaded bends with varying radii, waveguide crossings with varied crossing angles (90° - 20°), splitters, tapered waveguides and waveguide interconnect to midboard interface slots. Moreover, results for fabricating electrical interconnect structures (e.g. tracing layers, vias, plated vias) top/bottom and through optical layers in OE-PCB stack are shown. The purpose of the complex routed copper layers is to enable the crucial demonstration of the fabrication and thermal robustness challenges inherent to electro-optical PCBs with optical layers. Process compatibility with accepted practices and challenges in production scale up for high volumes are key concerns to meet the yield target and cost efficiency. Results include waveguide characterization, waveguide transmission loss, misalignment tolerance, and effect of lamination. Moreover, we show results on waveguide termination by in-plane edge connector and with 90° out-of-plane couplers.