International Technology Roadmap for Semiconductors 2003の要求清浄度について - シリコンウエハ表面と雰囲気環境に要求される清浄度, 分析方法の現状について -
International Technology Roadmap for Semiconductors 2003の要求清浄度について - シリコンウエハ表面と雰囲気環境に要求される清浄度, 分析方法の現状について -
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DOI:
10.11203/jar.19.177
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发表时间:
2004-09
期刊:
影响因子:
--
通讯作者:
裕幸 飯田;菊男 竹田;武利 藤本
中科院分区:
文献类型:
--
作者:
裕幸 飯田;菊男 竹田;武利 藤本
This paper describes the cleanliness levels for the manufacturing environment and silicon wafer surface required by International Technology Roadmap for Semiconductors 2003. Concerning the contamination level for particles there is no significant revision from the 2001 version. As for AMCs, the required level of organic contaminants is expressed in terms of C 16 H 34 instead of CH 4. Table 114 of Technology Requirement for Wafer Environmental Contamination Control summarizes the levels of Surface Molecular Contaminants (SMCs) which are the adsorbed amounts of SMCs after 24-hour exposure of wafer to the air in FOUP (Front Opening Unified Pod), Pod, Mini-environment as well as clean room air. Recent levels of detection limits of various analytical methods are discussed, and the analysis results for both SMCs on silicon wafer exposed to the air in carrier case and the AMCs in the atmosphere are introduced.