Amber*: Enabling Precise Full-System Simulation with Detailed Modeling of All SSD Resources
Amber*: Enabling Precise Full-System Simulation with Detailed Modeling of All SSD Resources
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DOI：
10.1109/micro.2018.00045
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发表时间：
2018-10
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影响因子：
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通讯作者：
Donghyun Gouk;Miryeong Kwon;Jie Zhang;Sungjoon Koh;Wonil Choi;N. Kim;M. Kandemir;Myoungsoo Jung
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作者：
Donghyun Gouk;Miryeong Kwon;Jie Zhang;Sungjoon Koh;Wonil Choi;N. Kim;M. Kandemir;Myoungsoo Jung
SSD 成为现代内存体系中的主要存储组件，SSD 研究需要通过将 SSD 子系统集成到全系统环境中来探索未来基于仿真的研究。然而，在全系统仿真下对 SSD 进行建模存在一些挑战； SSD由自己完整的系统和架构组成，采用所有必要的硬件，例如CPU、DRAM和互连网络。使用硬件组件时，SSD 还需要具有多个设备控制器、内部缓存和遵守各种存储接口和协议的软件模块。这些SSD硬件和软件都是体现全系统环境下存储子系统所必需的，可以与主机系统并行运行。在这项工作中，我们引入了一种新的 SSD 模拟框架 SimpleSSD 2.0，即 Amber，它对嵌入式 CPU 内核、DRAM 和各种闪存技术（在 SSD 内）进行建模，并通过启用数据传输模拟在完整的系统模拟环境下运行。 Amber 还包括完整的固件堆栈，包括 DRAM 缓存逻辑、闪存固件（例如 FTL 和 HIL），并通过修改流行的完整系统模拟器的所有功能和时序 CPU 模型 (gem5) 的主机 DMA 引擎和系统总线来遵守各种标准协议。所提出的模拟器可以捕获在各种操作系统和硬件平台执行下嵌入式内核、DRAM、固件和闪存的动态性能和功率的细节。使用 Amber，我们通过模拟不同类型的完整系统（例如移动设备和通用计算机）来描述几个系统级挑战，并通过比较被动存储和主动存储架构来提供全面的分析。
SSDs become a major storage component in modern memory hierarchies, and SSD research demands exploring future simulation-based studies by integrating SSD subsystems into a full-system environment. However, several challenges exist to model SSDs under a full-system simulations; SSDs are composed upon their own complete system and architecture, which employ all necessary hardware, such as CPUs, DRAM and interconnect network. Employing the hardware components, SSDs also require to have multiple device controllers, internal caches and software modules that respect a wide spectrum of storage interfaces and protocols. These SSD hardware and software are all necessary to incarnate storage subsystems under full-system environment, which can operate in parallel with the host system. In this work, we introduce a new SSD simulation framework, SimpleSSD 2.0, namely Amber, that models embedded CPU cores, DRAMs, and various flash technologies (within an SSD), and operate under the full system simulation environment by enabling a data transfer emulation. Amber also includes full firmware stack, including DRAM cache logic, flash firmware, such as FTL and HIL, and obey diverse standard protocols by revising the host DMA engines and system buses of a popular full system simulator's all functional and timing CPU models (gem5). The proposed simulator can capture the details of dynamic performance and power of embedded cores, DRAMs, firmware and flash under the executions of various OS systems and hardware platforms. Using Amber, we characterize several system-level challenges by simulating different types of full-systems, such as mobile devices and general-purpose computers, and offer comprehensive analyses by comparing passive storage and active storage architectures.