Automatic generation of fast timed simulation models for operating systems in SoC design
Automatic generation of fast timed simulation models for operating systems in SoC design
复制标题
自动生成 SoC 设计中操作系统的快速定时仿真模型
DOI：
10.1109/date.2002.998365
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发表时间：
2002
期刊：
影响因子：
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通讯作者：
A. Jerraya
中科院分区：
文献类型：
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作者：
S. Yoo;G. Nicolescu;L. Gauthier;A. Jerraya
为了能够快速，准确地评估片上通信的硬件/软件实现的选择，我们提出了一种方法来自动生成定时操作系统仿真模型。该方法将仿真环境作为虚拟处理器生成操作系统仿真模型。由于生成的操作系统仿真模型使用最终的操作系统代码，因此该方法可以缓解操作系统代码等价性问题。生成的模型还模拟不同类型的处理器异常。这种方法提供了两个数量级更高的仿真加速比的模拟使用指令集模拟器的SW仿真。
To enable fast and accurate evaluation of HW/SW implementation choices of on-chip communication, we present a method to automatically generate timed OS simulation models. The method generates the OS simulation models with the simulation environment as a virtual processor Since the generated OS simulation models use final OS code, the presented method can mitigate the OS code equivalence problem. The generated model also simulates different types of processor exceptions. This approach provides two orders of magnitude higher simulation speedup compared to the simulation using instruction set simulators for SW simulation.